1. Field of the Invention
The present invention relates to a method and apparatus for evaluating noise immunity of a semiconductor device.
2. Related Art
Conventionally, noise immunity evaluation of a semiconductor device during the design phase is carried out by performing circuit simulations using an equivalent circuit of the semiconductor device. One example of such a noise immunity evaluation method is disclosed as “Device and Method for Simulation for Semiconductor Integrated Circuit” in Unexamined Japanese Patent Application Publication No. H07-262263.
FIG. 13 shows an equivalent circuit representing a semiconductor integrated circuit (hereafter referred to as a “semiconductor device”) which is evaluated using this example conventional method.
In the drawing, an equivalent circuit 1300 includes terminals 1301 and 1302, logic equivalent circuits 1331-1334, resistors 1311-1314, and inductors 1321-1324. The terminal 1301 represents a power supply terminal of the semiconductor device. The terminal 1302 represents a ground terminal of the semiconductor device. The logic equivalent circuits 1331-1334 each represent a different one of a plurality of circuit blocks of the semiconductor device. The resistors 1311-1314 and the inductors 1321-1324 represent power supply paths over which power is supplied to the corresponding circuit blocks.
In this conventional method, the logical behavior of each of the logic equivalent circuits 1331-1334 is examined to find the power consumption and output signal delay of the logic equivalent circuit. The power consumption and output signal delay are then used to calculate the flow of current through the logic equivalent circuit and its maximum rate of change. Further, a counterelectromotive force generated in the corresponding power supply path is calculated from the flow of current, the maximum rate of change, the resistance of the corresponding resistor, and the inductance of the corresponding inductor. A sum-total of the counterelectromotive forces calculated for the logic equivalent circuits 1331-1334 is compared with a predetermined tolerance level, and the comparison result is output.
By comparing the sum-total of the counterelectromotive forces with the predetermined tolerance level in this way, the probability of malfunction in the semiconductor device can be judged. The immunity of the semiconductor device from switching noise can be evaluated based on this judgement.
However, the conventional method evaluates only the immunity of the semiconductor device from switching noise that occurs within the semiconductor device, and cannot evaluate the immunity of the semiconductor device from so-called extraneous noise, which is introduced into the semiconductor device from outside.
Also, though a semiconductor device is usually connected to an external circuit to achieve its function, the conventional method does not take the effects of such an external circuit into account.